ECE graduate students win 2019 Qualcomm Innovation Fellowship

Castañeda and Gallyas-Sanhueza presenting their proposal at QualcommOscar Castañeda and Alexandra Gallyas-Sanhueza, both electrical and computer engineering graduate students advised by Assistant Professor Christoph Studer, have received a 2019 Qualcomm Innovation Fellowship for their proposal, “PPAC: In-Memory Accelerator for Matrix-Vector-Product-Like Tasks.” PPAC (an acronym for Parallel-Processor in Associative Content-addressable memory), is an efficient and versatile in-memory accelerator for a broad range of matrix-vector-product-like tasks.

The project is aimed at developing in-memory computation based on readily-available and well-established technologies. Unlike other in-memory accelerators that have been either too general to meet the performance requirements of today's high-performance applications, or too specific to be widely used, PPAC offers an alternative to accelerate a set of operations with a matrix-vector-product structure that can be used in a broad range of scenarios, such as forward-error correction, cryptography, approximate nearest-neighbor search, and signal processing. The award consists of a $100,000 fellowship, as well as mentorship from Qualcomm engineers.

Studer’s VLSI Information Processing (VIP) Group does research at the intersection of wireless communication, digital signal processing (DSP), and very-large-scale integration (VLSI) circuit and system design. The group’s main focus is on developing novel algorithms for applications demanding high throughput, low latency and best solution quality, and integrating them into efficient (in terms of power consumption, throughput and silicon area) application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs). To arrive at best-in-class hardware designs, they jointly consider communication and information theory, signal processing, algorithm development, architecture design, and hardware implementation aspects, which enables far more efficient solutions than conventional, atomistic DSP or VLSI design approaches that solely focus on one of the two fields.

Oscar Castañeda is a third-year Ph.D. student in the VLSI Information Processing (VIP) Group, where he is working on digital VLSI design for signal processing, wireless communication, machine learning and emerging computer architectures. In 2016, he received his bachelor’s degree in electronics engineering from Universidad Del Valle de Guatemala, Guatemala City, Guatemala. In Fall 2017, he was a visiting researcher at ETH Zürich, Switzerland, where he was exposed to state-of-the-art CAD tools used for fabricating ASICs. During Spring 2018, Oscar was the lead designer of a 28nm CMOS ASIC tape-out at Cornell.

Alexandra Gallyas-Sanhueza is a first-year Ph.D. student in the VLSI Information Processing (VIP) Group at Cornell, where she is working on algorithms and VLSI design for millimeter-wave wireless systems. In 2015, she received her bachelor’s degree in electrical engineering from Universidad Católica de Chile. Before starting her Ph.D., she worked as a circuit designer at the Cornell Synchrotron Laboratory.

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