Qualifying Examination (Q Exam)

The following is a set of guidelines to govern the administration of the School of Electrical and Computer Engineering (ECE) Graduate Field’s Qualifying Examination. The purpose of these guidelines is to create a uniform, rigorous standard by which the ECE Graduate Field can assess the qualifications and preparation of students to continue in the ECE Ph.D. Program.

Format of the Qualifying Examination

The Qualifying Examination is an assessment of the qualification of incoming graduate students for a graduate program in the Field of Electrical and Computer Engineering. The overall outcome of the Qualifying Examination is determined during the Gradate Annual Review (GAR) by the entire ECE Field Faculty and holistically considers the following components to aware one of two possible outcomes.

  • Results for a Set of Subject Area Examinations
  • Grades for all Graduate Level Coursework taken at Cornell to date
  • Direct input from the Student’s Advisor / Committee Chair describing the Student’s Research Progress
  • Direct input from the members of the ECE Graduate Field Faculty describing the Student’s Progress and Demeanor as an ECE Ph.D. Student

Outcomes of the Qualifying Examination

  • PASS - Based on the above points of criteria, the Student will have demonstrated the necessary ability and aptitude to continue in the ECE Ph.D. Program.
  • FAIL – Based on the above points of criteria, the Student has not demonstrated the necessary ability to effectively continue in the ECE Ph.D. Program. The Student will be instructed to meet with the Director of Graduate Studies and his/her Advisor / Committee Chair to discuss the proper course of action.

Timing of the Qualifying Examination

  • The Student’s Qualifying Examination results will be considered during the Graduate Annual Review (GAR) which usually takes place soon after the Subject Area Examinations are completed.
  • The Qualifying Examination is offered once a year, at the end of the Spring Semester.
  • Students are eligible to participate in the Qualifying Examination at any time during their first Four (4) Semesters of Enrollment of graduate study.
  • Students must successfully complete the Qualifying Examination by the end of their Fourth Semester of enrollment of graduate study in order to remain in good academic standing as determined by the Field of Electrical and Computer Engineering.

Subject Area Examinations

Format of the Subject Area Examinations

  • Subject Area Examinations are oral examinations with a duration of 20 – 30 minutes each.
  • Each Subject Area Examination will focus on a specific subject with the ECE Graduate Field. They include the following Eight (8) separate subjects. (See individual subject syllabi at bottom of page.)
    1. Random Processes and Probability
    2. Computer Architecture
    3. Computer Systems
    4. Circuits and Devices
    5. Solid State and Quantum
    6. Electromagnetics and Optics
    7. Digital VLSI
    8. Linear Systems
  • Each Subject Area Examination will focus on material covered in a reasonable undergraduate curriculum on Electrical and Computer Engineering. Subject Area Examinations will have an associate syllabus to act as a study guide.
  • Subject Area Examinations are administered by a Two (2) Person Committee consisting of ECE Graduate Field Faculty Members that are well-versed in the corresponding subject.
  • The Subject Area Examination Committee must not include a Student’s Advisor / Committee Chair.

Subject Area Examination Outcomes

For each Subject Area Examination, the Subject Area Examination Committee will aware One of Three Possible Outcomes:

  • EXCELLENT – Student has demonstrated an excellent understanding of the corresponding Subject Areas that exceeds the expectations of a reasonable Ph.D. candidate within the ECE Graduate Field.
  • SATISFACTORY – Student has demonstrated a satisfactory understanding of the corresponding Subject Areas that meets the expectations of a reasonable Ph.D. candidate within the ECE Graduate field.
  • UNSATISFACTORY – Student has demonstrated an unsatisfactory understanding of the corresponding Subject Areas that is beneath the expectations of a reasonable Ph.D. candidate within the ECE Graduate Field.

The Subject Area Examination Committee will provide a written review of the Student’s performance on the Examination(s) and the justification for the awarded outcome.

Achieving an outcome of either EXCELLENT or SATISFACTORY on Two (2) or more of the Subject Area Examinations covering at least Two (2) separate Subjects is sufficient to complete the exam criteria of the Qualifying Examination.

Timing of the Subject Area Examinations

  • Subject Area Examination are administered annually during a one-week period near the end of the Spring Semester.
  • The scheduled dates of the Subject Area Examinations are determined by the ECE Director of Graduate Studies and will be announced in advance.
  • Subject Area Examinations may potentially be administered at other times due to family, medical emergency or other exceptional circumstances only, as determined by the ECE Director of Graduate Studies.
  • Students are encouraged to take Two (2) Subject Area Examinations on Two (2) Separate Subjects in their first year of graduate study.

Appeals of Subject Area Examination Results

  • Students may appeal the results of a Subject Area Examination if he/she believes that an error has been made in his/her case.
  • The Student must file a written appeal to the ECE Director of Graduate Studies within One (1) Week of receiving the results of the Subject Area Examination.
  • The written appeal must be in the form of a formal, signed letter detailing the specific reasons why the Student believes the outcome of the Subject Area Examination should be changed.
  • A finalized decision regarding the written appeal will be rendered by the ECE Director of Graduate Studies in consultation with the Graduate Committee.

Syllabi for ECE Qualifying Examination

Students may review details regarding each Subject Area in order to effectively prepare for the Subject Area Examinations.

01 Subject Area: Random Processes and Probability

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Reference:

Probability, Statistics, and Random Processes for Electrical Engineering by Alberto Leon-Garcia.

Basic Concepts:

Sample spaces, probability measures, outcomes, events, combinatorial approaches to computing probabilities, conditioning, total probability, independence, Bayes’ rule.

Random Variables:

Definition of, probability mass functions (PMFs), probability density functions (PDFs), cumulative distribution functions (CDFs), commonly used distributions, expectations, characteristic functions, moment inequalities.

Random Vectors:

Definition of, joint PMFs, PDFs, and CDFs, joint characteristic functions, conditional distributions and conditional expectation, joint moments, covariance matrices and their properties, jointly Gaussian random variables.

Limit Theorems:

Law of large numbers, central limit theorem.

Estimation:

LLSE and MMSE estimators.

Detection:

MAP and ML detectors. 

Second-Order Random Processes:

Stationarity and wide-sense stationarity, autocorrelation, power spectral density, white noise, filtered random processes. 

Discrete-Time Markov Chains:

Definition, conditions for stationarity, n-step transition probabilities, stationary distributions, occupancy rates. 

Continuous-Time Markov Chains: 

Definition, conditions for stationarity, the forward and backward equations, Poisson processes, the M/M/1 queue, occupancy rates. 

02 Subject Area: Computer Architecture

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Helpful Resources:

The area exam will cover the topics listed below. The following resources may be helpful in studying the topics. 

  • Cornell Undergraduate Courses: ECE2300, ECE4750 
  • References:“Digital Design and Computer Architecture” by Harris & Harris, “Computer Architecture: A Quantitative Approach” by Hennessy & Patterson, “On-Chip Networks (Synthesis Lectures on Computer Architecture)” by Peh and Jerger. 

Boolean Algebra: 

Axioms and main theorems of Boolean algebra; combinational logic minimization: Algebraic simplification, Karnaugh maps, don’t-cares, races. 

Combinational Blocks: 

Mux, demux, decoder, encoder; carry-propagate adder, carry-save adder, carry- lookahead adder; integer multiplication. 

Sequential Logic: 

D-latch and SR-latch; master-slave D-flip-flop; timing of latches and flip-flops (setup/hold times); timing analysis (max. clock frequency, critical path, clock skew); race conditions; FSMs, communicating FSMs; Mealy and Moore automata; sequential logic design; registers, counters, timers. 

Processors (basic): 

Instruction set architectures; single-cycle processor datapath and control unit; hardwired vs. microcoded processors; pipelined processors; resolving structural, data, control, and name hazards; handling exceptions; analyzing processor performance (iron law of processor perf.); transition from CISC to RISC. 

Memories: 

Memory technology (registers, register files, SRAM, DRAM); spatial vs. temporal locality; direct-mapped vs. associative caches; write-through vs. write-back caches; replacement policies; parallel-read, pipelined-write caches; integrating processors and caches; analyzing memory performance (avg. memory access latency); virtual memory, page table, TLB; virtually vs. physically addressed/tagged caches; cache coherence, MSI; memory consistency; locks, barriers. 

Networks: 

Integrating processors, caches, and networks; analyzing network performance (ideal throughput, zero-load latency). 

Processors (advanced): 

Superscalar execution; out-of-order execution: scoreboard, issue queue, reorder buffer, handling exceptions; register renaming: pointer-based, value-based schemes; memory disambiguation: finished-store buffer, finished-load buffer, load/store queues, in-order vs. out-of-order load/store issue; branch prediction: software-based, predication, one-level and two-level branch-history tables, tournament predictors, branch-target buffer, return address stack; speculative execution; VLIW processors: loop unrolling, software pipelining; SIMD processors: subword-SIMD, vector-SIMD; multithreaded processors: vertical multithreading, simultaneous multithreading. 

Note: 

It is not enough just to be able to describe concepts; you will need to be able to apply concepts in new contexts, and also be able to evaluate design alternatives. 

03 Subject Area: Computer Systems

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Helpful Resources: 

The area exam will cover the topics listed below. The following resources may be helpful in studying the topics. 

  • Cornell Undergraduate Courses: ECE2400, ECE3140, CS4410, [CS4450]
  • References: “All of Programming”, Hilton & Bracy, “Hard Real-Time Computing Systems” by Buttazzo (available online through Cornell Library), “Operating Systems: Three Easy Pieces” by Arpaci-Dusseau & Arpaci-Dusseau. 

Programs: 

Instruction set architectures: instruction encoding, register organization, endianness, control flow; compiling, linking, and loading. 

Calling Conventions and Stack: 

Parameter-passing conventions; stack structure; stack frame. 

Interrupts and Exceptions: 

Polling; interrupts; exceptions; software traps; system calls. 

Process Management: 

Time-sharing; context switching; scheduling: FCFS, round-robin, priority, SJF; aperiodic real-time: EDD/EDF; periodic real-time; rate-monotonic scheduling; inter-process communication. 

Memory Management and Storage: 

Program layout, stack, heap; Memory protection, translation, and virtualization: base/bound, paging, segmentation; TLB; virtual memory; memory allocation; basic I/O; storage. 

Concurrency: 

Critical sections; atomicity; mutual exclusion, progress, fairness; locks and monitors; RMW operations, t&s; ticket lock; semaphores; wait/signal; Hoare vs. Mesa semantics; readers and writers; producers and consumers; priority inversion, PIP, PCP. 

Networking: 

End-to-End argument, Physical networking: wireless, circuit-and packet-switched, mobile networks; data link: MAC addresses, error correcting codes; medium access: ethernet, wireless LANs, bridging; network layer: routing, congestion control, QoS; transport layer: sockets, UDP, TCP; application layer: remote procedure calls, DNS; security: basic crypto, symmetric key algorithms, public key, digital signatures, key management, firewalls/IPSec, authentication protocols, web security (SSL). 

Note: 

It is not enough just to be able to describe concepts; you will need to be able to apply concepts in new contexts, and also be able to evaluate design alternatives. 

04 Subject Area: Circuits and Devices

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The Circuits and Device area Subject Area Exam tests for the physical understanding of the behavior of semiconductor electronic devices and the principles underlying the behavior, and the ability and understanding of the design, analysis, and limitations of fundamental circuits. 

This therefore includes the breadth of the behavior of electrons and holes and their transport in devices; modeling of that behavior in static, low frequency and high frequency conditions; and the application of such devices to circuits. Students are expected to demonstrate an understanding of devices (diodes, transistors and memories), transfer functions, feedback, and the limitations to the analysis of the physical behavior and models and the limits this places on their applicability. 

A list of Topical Areas in Circuits includes: 

  • Derive transfer functions of RLC circuits in Laplace and Fourier domains and be able to sketch the Bode plot of a transfer function. 
  • Apply Millers theorem to an amplifier with feedback (This includes real amplifiers such as common-source, common drain, etc). 
  • Analyze basic op-amp circuits assuming an ideal op-amp. 
  • Draw complete (with capacitors) small-signal model of a MOSFET or BJT. 
  • Bias and Analyze a i) common source/common emitter amplifier, ii) common drain/common collector amplifier, and iii) common gate/common base amplifier for small signal gain, Zin and Zout for both low- and high-frequency cases (ie with and without including capacitors) 
  • Analyze a CMOS inverter in large signal, low frequency behavior, both single and multi-stage 
  • Analyze a cascode amplifier at low frequency for small signal gain, Zin and Zout. 
  • Analyze a differential pair at low frequency for small signal gain, Zin and Zout. 
  • Perform small-signal high-frequency analysis of an active current mirror. 
  • Calculate common-mode gain of a differential pair biased with a current mirror. 
  • Calculate the gain and transfer function of a simple op-amp. 
  • Be able to estimate the input impedance of an op-amp or other large amplifier. 
  • Calculate open- and closed-loop transfer function of a feedback loop in the following situations o Op-amp circuits 
    • Common mode feedback 
  • Be able to describe the benefit of feedback for: o Increase bandwidth 
    • Improve linearity 
    • Stabilize unstable systems 
    • Understand noise sources due to pn-junctions, BJTs, MOSFETs, and flicker. 

A list of Topical of Areas in Devices includes: 

  • Electrons and holes in semiconductors (donors, acceptors, carrier populations, thermal equilibrium, electrostatic potential, Fermi energy, quasi-Fermi energy, temperature dependences, transport by drift and diffusion, generation and recombination). 
  • Energy description of device structures via band diagrams (conduction and valence band edges, quasi-Fermi energy and heterostructures). 
  • Junctions and diodes (metal-semiconductor junctions, ohmic contacts based on tunneling and interface recombination, p/n junction) in static, quasistatic, dynamic, and at high frequencies and their models. 
  • MOS junction (charge analysis, low-frequency, high frequency, deep depletion behavior, inversion layers, quantum-confinement effects). 
  • MOSFET (sheet charge modeling of MOSFET, gradual channel approximation, characteristics in sub-threshold and supra-threshold conditions with drift and diffusive flow, quasistatic and small-signal models). 
  • MOSFET at small scale (scaling, short channel effects, parasitic bipolars, gate tunneling, drain-induced barrier lowering, gate-induce drain leakage, hot electron effects, Instabilities and stress-induced leakage currents, and transistors based on SOI, double-gate, strain, high-permittivity and fins). 
  • Memories (static and dynamic random access memories, non-volatile FLASH memories) 
  • Bipolar transistors (Design, polysilicon emitters, Ebers-Moll models, breakdown, Gummel plots, graded heterostructure bases, SiGe, IIIV, high frequency and digital models). 
  • Noise (Thermal, shot and 1/f noise, and such noise in MOSFETs and bipolar transistors) 

A reasonable text that tackles much of this breadth is Y. Taur and T. H. Ning, “Fundamentals of modern vlsi devices,” Cambridge, ISBN 978-0-521-83294-6 

05 Subject Area: Solid State and Quantum

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The Material covered in ECE 4070 (Solid State Physics of Semiconductors and Nanostructures) and material on introductory quantum mechanics. 

Material covered in ECE 4070 can be found at the following course website: 

Material on introductory quantum mechanics can be found in the following book: 

  • Title: Introduction to Quantum Mechanics (Chapters 1 through 9)
  • Author: David J. Griffiths
  • Publisher: Pearson Prentice Hall

06 Subject Area: Electromagnetics and Optics

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There are five general areas in E&M that you are expected to understand with sufficient depth to be able to describe the physics and limitations of a simple device or process. 

  1. Electrostatics

    • Coulomb’s law 
    • Poisson, Laplace equations 
    • Gauss’s law of electrostatics 
    • Potential energy 
    • Image charges 
    • Boundary value problems
    • Energy stored in the electric field
  2. Magnetostatics 

    • Biot-Savart law
    • Ampere’s law of magnetostatics
    • Vector potential 
    • Lorentz force and torque 
    • Energy stored in the magnetic field
  3. Maxwell’s equations

    • Faraday’s law, induction
    • Displacement current
    • Constitutive relations 
    • Wave equation 
      • Solutions with rectilinear, cylindrical, and spherical boundary conditions 
      • Plane electromagnetic waves, wave propagation, and evanescent waves 
      • Polarization
      • Reflection, refraction, interference 
    • Energy conservation and Poynting’s vector
  4. Waveguides, Resonant cavities, and Modes

    • Electromagnetic boundary conditions 
    • TE, TM, TEM waveguide modes 
    • Fabry-Perot resonators
  5. Radiation

    • Electric dipole fields and radiation
    • Magnetic dipole fields and radiation
    • Simple dipole arrays, and image dipoles 

07 Subject Area: Digital VLSI

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Helpful Resources: 

The area exam will cover the topics listed below. The following resources may be helpful in studying the topics. 

  • Cornell Undergraduate Courses: ECE2300, ECE4740 
  • References: “Digital Design and Computer Architecture” by Harris & Harris, “CMOS VLSI Design: A Circuits and Systems Perspective” by Weste & Harris. 

VLSI General: 

Moore’s Law; Kryder’s Law; Koomey’s Law. 

Boolean Algebra: 

Axioms and main theorems of Boolean algebra; combinational logic minimization: Algebraic simplification, Karnaugh maps, don’t-cares, races. 

MOSFET: 

P-N junction and diodes; operation regimes; body effect; short-channel effects; parasitic capacitances; switch model; pass transistors and transmission gates. 

CMOS Inverter: 

Voltage transfer characteristics; operation regimes; regenerative property and noise margins; latch-up; dynamic behavior; propagation delay; sizing (logical effort). 

Static CMOS: 

Pull-up and pull-down networks; CMOS gate synthesis and analysis; standard-cell design; stick diagrams and Euler path; timing characteristic (worst/best case delay, rise/fall times); gate sizing (logical effort); pass-transistor (PT) logic; transmission-gate (TG) logic. 

Dynamic Logic: 

Dynamic CMOS; domino logic; np-CMOS, zipper, and NORA logic. 

Sequential Logic: 

D-latch and SR-latch; master-slave D-flip-flop; timing of latches and flip-flops (setup/hold times); timing analysis (max. clock frequency, critical path, clock skew); race conditions. 

Wire Models: 

RC model; fringing capacitance; wire parasitics and crosstalk; Elmore delay; IR drop. 

Energy/Power Consumption: 

Static CMOS power consumption; dynamic CMOS power consumption; statistical power analysis; low-power design techniques; voltage-frequency scaling; leakage reduction. 

Architecture Transforms: 

Area/delay trade-off; coarse- and fine-grain pipelining; retiming; replication; iterative decomposition; time sharing.  

Adder Circuits: 

Full adder (various designs); ripple-carry adder; Manchester-carry chain; carry-skip adder; carry-select adder; carry-save adder (CSA); carry-lookahead adder (CLA). 

Arithmetic/Logic Circuits: 

Two’s complement/sign magnitude numbers; shifters and rotator circuits; comparator circuits; n-input multiplexers; array and CSA multipliers. 

Memories and ROMs:

NAND and NOR ROM; SRAM (design and sizing of 6T cells); DRAM (3T and 1T cells); NAND/NOR row decoders; precharge circuitry; sense amplifiers. 

Note:

It is not enough just to be able to describe concepts; you will need to be able to apply concepts in new contexts, and also be able to evaluate design alternatives. 

08 Subject Area: Linear Algebra, Signals, and Systems

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References: 

Linear algebra at the level of Gilbert Strang’s Introduction to Linear Algebra (see also the MIT couseware http://web.mit.edu/18.06/www/) or Sheldon Axler’s Linear Algebra Done Right. Signals and systems concepts at the level of A. V. Oppenheim and A. S Wilsky’s Signals and Systems

Linear Algebra: 

Vector spaces, linear mappings, spanning sets, bases and dimension of finite-dimensional vector spaces; nullspace, range, and rank of arbitrary real and complex matrices; determinant, trace, invertibility, eigenvalues, and eigenvectors of square real and complex matrices; inner-product spaces and orthogonal/unitary diagonalizability of Hermitian matrices; singular-value decomposition of arbitrary real and complex matrices; condition number of invertible square matrices. 

Signals Basics: 

Real- and complex-valued continuous- and discrete-time signals; convolution in continuous and discrete time. 

Systems Basics: 

Single-input single-output LTI systems in continuous and discrete time; impulse response; causality and BIBO stability of SISO LTI systems (definitions and impulse-response criteria). 

Spectral Concepts in Continuous Time: 

Fourier series of continuous-time periodic signals; Fourier transforms of continuous-time signals; the idea of frequency content and bandwidth of continuous-time signals; frequency response of continuous-time LTI systems; ideal filters. 

Spectral Concepts in Discrete Time: 

The discrete-time Fourier transform and the Sampling Theorem; frequency response of discrete-time LTI systems; The DFT and the FFT for N-point signals. 

Other Transforms and Applications: 

The two-sided z-transform and two-sided Laplace transform; transfer functions of continuous - and discrete-time SISO LTI systems; criteria for BIBO stability in terms of transfer functions.