ECE’s Zhiru Zhang has been promoted to the rank of Associate Professor following approval from the Cornell Engineering Board of Trustees, effective July 1, 2018.
ECE’s Zhiru Zhang has been promoted to the rank of Associate Professor following approval from the Cornell Engineering Board of Trustees, effective July 1, 2018.
Zhang joined the School of Electrical and Computer Engineering at Cornell University as an assistant professor in 2012. He is a member of the Computer Systems Laboratory (CSL) which works on hardware and software techniques for improving the cost, performance, programmability, reliability and energy efficiency of future computer systems.
His research investigates new algorithms, methodologies, and tools to extend the frontiers of design automation for high-performance and energy-efficient computer systems. More concretely, his recent publications address topics of high-level synthesis, specialized hardware accelerator design, and software-defined reconfigurable systems.
Zhang’s research and teaching have been recognized with several awards, including the UCLA Engineering Rising Professional Achievement Award (2018), DARPA Young Faculty Award (YFA) (2015), the IEEE CEDA Ernest S. Kuh Early Career Award (2015), the NSF CAREER Award (2015), the Ross Freeman Award for Technical Innovation from Xilinx (2012), a Best Paper Award from the ACM Transactions on Design Automation of Electronic Systems (2012), a Best Short Paper Award from FCCM'2018, and three best paper nominations (ICCAD'2009, FPGA'2017, FPGA'2018). On the teaching side, he received the Michael Tien'72 Excellence in Teaching Award (2016), which is the highest recognition for teaching awarded by the Cornell Engineering.
Zhang received an M.S. and Ph.D. in computer science from the University of California, Los Angeles, and received a B.S. in computer science from Peking University. Prior to joining Cornell, Dr. Zhang co-founded AutoESL Design Technologies, Inc. to commercialize his PhD research on high-level synthesis. AutoESL was later acquired by Xilinx and the AutoESL tool was rebranded as Vivado HLS after the acquisition. Vivado HLS is now available to thousands of FPGA designers worldwide, becoming the first mainstream and currently the most widely deployed C-based design tool for FPGAs.
Read more about Zhang’s work at:
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