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David H. Albonesi

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  • David H. Albonesi
  • Dept: Electrical and Computer Engineering
  • Title: Professor
  • Address: Room 333 Phillips Hall
  • Phone: 607 255-5473
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Biography

David Albonesi is Professor of Electrical and Computer Engineering at Cornell University and a member of the Computer Systems Laboratory. Previously, he served on the ECE faculty at the University of Rochester and was a technical manager, computer architect, and chip designer at IBM and Prime Computer. His current research interests include adaptive and reconfigurable multi-core architectures, power- and reliability-aware computing, and energy-efficient smart buildings.

Dr. Albonesi is a Fellow of the IEEE, and has received the National Science Foundation CAREER Award, three IBM Faculty Awards, three IEEE Micro Top Picks paper awards, and three industry excellence awards. He teaches courses ranging from freshman-level introductory computing to advanced graduate topics in computer architecture.

Research Interests

Computer Architecture, Smart Buildings

Teaching Interests

Computer Engineering

Selected Publications

  • Petrica, Paula, Adam Izraelevitz, David H. Albonesi, Christine Ann Shoemaker. 2013. "Flicker: A Dynamically Adaptive Architecture for the Dark Silicon Era." Paper presented at International Symposium on Computer Architecture, June.
  • Majumdar, A., David H. Albonesi, P. Bose. 2012. "Energy-Aware Meeting Scheduling Algorithms for Smart Buildings." Paper presented at 4th ACM Workshop on Embedded Systems for Energy-Efficiency in Buildings, November.
  • Watkins, M.A., David H. Albonesi. 2010. "ReMAP: A Reconfigurable Heterogeneous Multicore Architecture." Paper presented at 43rd International Symposium on Microarchitecture, December.
  • Lopez, S., O. Garnica, David H. Albonesi, S. Dropsho, J. Lanchares, J.I. Hidalgo. 2010. "Adaptive Cache Memories for SMT Processors." Paper presented at 13th Euromicro Conference on Digital System Design, September.
  • Watkins, M.A., David H. Albonesi. 2010. "Dynamically Managed Multithreaded Reconfigurable Architectures for Chip Multiprocessors." Paper presented at 19th International Conference on Parallel Architectures and Compilation Techniques, September.

Selected Awards and Honors

  • Fellow of IEEE (IEEE) 2011
  • Michael Tien '72 Excellence in Teaching Award (Cornell University, College of Engineering) 2011
  • IEEE Micro Top Picks in Computer Architecture 2010
  • IEEE Micro Top Picks in Computer Architecture 2006
  • IBM Faculty Award 2003

Websites

Education

  • BS (Electrical Engineering), University of Massachusetts-Amherst, 1982
  • MS (Electrical Engineering), Syracuse University, 1986
  • Ph D (Computer Engineering), University of Massachusetts-Amherst, 1996